Building on the successful implementation of the first phase of the Semicon India Programme (Semicon 1.0), the Union Cabinet has approved the next phase of Semicon India Programme (Semicon 2.0) with a fiscal outlay of ₹ 1,27,500 crore to accelerate the development of a robust and resilient semiconductor ecosystem in India.
The semiconductor industry functions through an extensive global supply chain involving equipment manufacturers, material suppliers, specialty chemical producers, industrial gas companies, packaging firms and service providers.
Semicon 2.0 therefore focuses on ecosystem development rather than only designing and manufacturing chips.
Objective
Our
Six Strategic Pillars
Design
Building on the initial success in chip design, the focus of Semicon 2.0 is to deepen the design ecosystem. For the strategic sectors requirements, building blocks, such as compute, memory, power, networking, RF and sensors, have been identified for the design and development of the semiconductor IPs/Chips/SoCs which will help in designing and developing new systems. For the commercial sectors, Startups/MSMEs will get seed money (Risk Capital) and IPs/EDA tools support. To accelerate the momentum, Indian Companies and companies owned by OCIs will also be allowed to participate. All eligible companies including the startups and MSMEs will get deployment linked incentive to offset their higher costs of tape-outs. These provisions under Semicon 2.0 are expected to place India as an integral partner in chip and IP design IP ecosystem globally.
Machines and Materials
Companies involved in the manufacturing and R&D of the machines and manufacturing of materials, chemicals and gases that are essential for manufacturing semiconductors will be incentivized. This will lay the foundation for the sustainable growth of the semiconductor industry. This will also enable domestic companies to become part of the global supply chains and help in developing the precision manufacturing industry in the country.
Setting up more Fabs
With the first fab scheduled to be commissioned in 2028, the world is showing greater confidence in India’s semiconductor ability and strategy. Efforts will be made to attract more manufacturers to come to India and set up fabs to manufacture chips. This will include silicon fabs, compound semiconductor fabs, discrete component fabs, display fabs, etc. The CMOS based silicon fabs will be financially supported with 40% of Capex on pari-passu basis and all other fabs will be eligible for 35% of Capex on pari-passu.
Further strengthening the ATMP/OSAT industry
With the approval of large numbers of ATMP/OSAT units, the world is now looking at India as an alternative hub for packaging of chips. The capacity additions will be actively encouraged with a focus on getting some of the most advanced packaging technologies in India. Advance packaging will be financially supported with 35% of Capex on pari-passu and other conventional packaging will be eligible for financial support of 25% of Capex on pari-passu basis.
Research & Development
The semiconductor journey has started with 28nm-110 nm as the node. Now, the focus will be on developing more advanced nodes and other advanced technologies in collaboration with leading R&D centres within and outside India.
Talent development
With 320 universities training students on complex chip design using the latest EDA tools, around 70,000 students have already been trained. The holistic experience for students from chip design to fabrications and packaging of chips will be further expanded to include more institutes/colleges. Further, the industry will be actively engaged in deepening the clean room, fab construction and other ecosystem training as well.
Six Strategic Pillars
Building on the initial success in chip design, the focus of Semicon 2.0 is to deepen the design ecosystem. For the strategic sectors requirements, building blocks, such as compute, memory, power, networking, RF and sensors, have been identified for the design and development of the semiconductor IPs/Chips/SoCs which will help in designing and developing new systems. For the commercial sectors, Startups/MSMEs will get seed money (Risk Capital) and IPs/EDA tools support. To accelerate the momentum, Indian Companies and companies owned by OCIs will also be allowed to participate. All eligible companies including the startups and MSMEs will get deployment linked incentive to offset their higher costs of tape-outs. These provisions under Semicon 2.0 are expected to place India as an integral partner in chip and IP design IP ecosystem globally.
Companies involved in the manufacturing and R&D of the machines and manufacturing of materials, chemicals and gases that are essential for manufacturing semiconductors will be incentivized. This will lay the foundation for the sustainable growth of the semiconductor industry. This will also enable domestic companies to become part of the global supply chains and help in developing the precision manufacturing industry in the country.
With the first fab scheduled to be commissioned in 2028, the world is showing greater confidence in India’s semiconductor ability and strategy. Efforts will be made to attract more manufacturers to come to India and set up fabs to manufacture chips. This will include silicon fabs, compound semiconductor fabs, discrete component fabs, display fabs, etc. The CMOS based silicon fabs will be financially supported with 40% of Capex on pari-passu basis and all other fabs will be eligible for 35% of Capex on pari-passu.
With the approval of large numbers of ATMP/OSAT units, the world is now looking at India as an alternative hub for packaging of chips. The capacity additions will be actively encouraged with a focus on getting some of the most advanced packaging technologies in India. Advance packaging will be financially supported with 35% of Capex on pari-passu and other conventional packaging will be eligible for financial support of 25% of Capex on pari-passu basis.
The semiconductor journey has started with 28nm-110 nm as the node. Now, the focus will be on developing more advanced nodes and other advanced technologies in collaboration with leading R&D centres within and outside India.
With 320 universities training students on complex chip design using the latest EDA tools, around 70,000 students have already been trained. The holistic experience for students from chip design to fabrications and packaging of chips will be further expanded to include more institutes/colleges. Further, the industry will be actively engaged in deepening the clean room, fab construction and other ecosystem training as well.